1. Field of the Invention
The present invention relates to a voltage regulator.
2. Description of the Related Art
A voltage regulator includes a phase compensation circuit for stable operation.
FIG. 4 is a circuit diagram of a conventional voltage regulator including a phase compensation circuit.
When an output voltage Vout increases, a divided voltage Vfb also increases. When the divided voltage Vfb becomes higher than a reference voltage Vref, an output voltage of a differential amplifier circuit 76 increases. Accordingly, a gate voltage of an output transistor 73 increases, and a drain current of the output transistor 73 decreases, whereby the output voltage Vout decreases. As a result, the output voltage Vout is controlled to be a desired constant voltage. On this occasion, a gate voltage of a sense transistor 77 also increases, and thus a drain current of the sense transistor 77 also decreases. For this reason, a current flowing through a resistor 78 decreases, with the result that a voltage generated in the resistor 78 also decreases. Through a change in voltage applied to a phase compensation capacitor 79 as described above, phase compensation is performed.
In this case, the divided voltage Vfb is a voltage obtained by superimposing a phase compensation signal which is sent from the differential amplifier circuit 76 via the sense transistor 77 and the phase compensation capacitor 79 back to the differential amplifier circuit 76 on a signal which is sent from the differential amplifier circuit 76 via the output transistor 73 and a voltage divider circuit 74 back to the differential amplifier circuit 76.
Even when the output voltage Vout decreases, the output voltage Vout is controlled to be a desired constant voltage as in the case of the above. On this occasion, phase compensation is performed as in the case of the above (for example, see JP 2005-316788 A).
However, in the conventional voltage regulator, when a difference between an input voltage and an output voltage is small, a voltage between a source and a drain of the sense transistor 77 becomes small depending on a condition of a load, and in some cases, the sense transistor 77 operates in non-saturation while the output transistor 73 operates in saturation. As a result, fluctuations in drain voltage of the sense transistor 77 do not coincide with fluctuations in drain voltage of the output transistor 73. Phase compensation is performed based on the drain voltage of the sense transistor 77, and hence, the phase compensation is inappropriately performed.